N121-001 TITLE: Atomic Layer Deposition Technology for Gallium Nitride Microwave Monolithic Integrated Circuits

TECHNOLOGY AREAS: Materials/Processes, Electronics

ACQUISITION PROGRAM: Ground/Air Task Oriented Radar (G/ATOR)

RESTRICTION ON PERFORMANCE BY FOREIGN CITIZENS (i.e., those holding non-U.S. Passports): This topic is "ITAR Restricted". The information and materials provided pursuant to or resulting from this topic are restricted under the International Traffic in Arms Regulations (ITAR), 22 CFR Parts 120 - 130, which control the export of defense-related material and services, including the export of sensitive technical data. Foreign Citizens may perform work under an award resulting from this topic only if they hold the "Permanent Resident Card", or are designated as "Protected Individuals" as defined by 8 U.S.C. 1324b(a)(3). If a proposal for this topic contains participation by a foreign citizen who is not in one of the above two categories, the proposal will be rejected.

OBJECTIVE: Develop an Atomic Layer Deposition (ALD) Silicon Nitride (SiN) thin-film process that is conformal, uniform, void and pin hole-free, dense, no embedded traps, and is deposited at a process temperature not exceeding 300 degrees C. The ALD SiN process to be developed must be both cost and processing time competitive with present PECVD SiN in use.

DESCRIPTION: DOD systems under development such as Active Phased Array Radars and Communication Systems utilize Gallium Arsenide (GaAs) and Gallium Nitride (GaN) MMICs, that use Plasma Enhanced Chemical Vapor Deposition (PECVD) Silicon Nitride thin film technology as both a passivation and as a dielectric for capacitors. PECVD deposited SiN dielectric film's embedded traps, pin-holes, overall lack of density, and voltage breakdown limitations, cause transistor gate leakage and capacitor failures on the MMIC, limiting MMIC wafer yield; however, an Atomic Layer Deposition Silicon Nitride Process would be dense, pin-hole and trap free uniform, and improved voltage breakdown, reducing the transistor gate leakage and capacitor failures, and improving the overall MMIC wafer yields.

PHASE I: Identify potential new and innovative research and development approaches that lead to an Atomic Layer Deposition (ALD) Silicon Nitride thin-film process. Explore expansion of the proposed process to other popular Silicon based thin film processes. Demonstration of the proposed prototype ALD SiN process is a plus at this stage, but not required. Collaboration with a GaN MMIC foundry is highly recommended.

PHASE II: Develop the proposed ALD thin-film SiN dielectric process, and other processes that are based upon the Phase I effort that will transition into a Gallium Nitride MMIC Foundry. Collaboration with a GaN MMIC foundry in Phase II is necessary in order to transition the process in phase III. Demonstrate the ALD SiN thin-film process, and measure the qualities and characteristics of the dielectric film.

PHASE III: Develop pre-production MMICs/ICs utilizing the processes developed under Phase I and II, in a GaN MMIC Foundry.

PRIVATE SECTOR COMMERCIAL POTENTIAL/DUAL-USE APPLICATIONS: Cell Phone industry, WiMAX, Commercial Radars and Communication Systems, and Power Applications such as DC-to-DC Converters.

REFERENCES:
1. S.M Sze, Physics of Semiconductor Devices, John Wiley & Sons, 1981.

2. Jacob Millman, Micro-Electronics: Digital and Analog Circuits and Systems, McGraw-Hill, 1979.

KEYWORDS: Atomic Layer Deposition (ALD); Silicon Nitride (SiN); Gallium Nitride (GaN); Microwave Monolithic Integrated Circuit (MMIC); Transistor; Thin-Film Technology

** TOPIC AUTHOR (TPOC) **

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