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Improved Diagnostic Capabilities of Avionic Systems Containing Boundary Scan Technology
Navy SBIR 2012.1 - Topic N121-021
NAVAIR - Ms. Donna Moore - [email protected]
Opens: December 12, 2011 - Closes: January 11, 2012

N121-021 TITLE: Improved Diagnostic Capabilities of Avionic Systems Containing Boundary Scan Technology

TECHNOLOGY AREAS: Air Platform, Sensors, Electronics

ACQUISITION PROGRAM: PMA 273

OBJECTIVE: Enable and modify Boundary Scan utilities to improve fault isolation of complex avionics Weapons Replaceable Assemblies (WRAs) at the Organizational Maintenance Level.

DESCRIPTION: Supporting avionic systems in a field environment is a daunting task. Organizational Level maintainers are tasked to quickly and accurately diagnose which Weapons Replaceable Assembly (WRA) has failed in a complex avionics system. This tasking would be acceptable if the maintainer had the proper tools to accurately reduce WRA ambiguity groups to one WRA. Unfortunately, for many of these complex systems, these tools are not available. Existing built -in-test (BIT)/support equipment solutions are often unable to assist the maintainer in identifying which specific WRA has failed in the avionics system. Without accurate methods of reducing WRA ambiguity groups to one WRA, the Organizational Level maintainer often has no choice but to remove and replace multiple WRAs until the system is repaired. As a result of these Organizational Level maintenance practices, Intermediate Level maintenance finds a large number of good or no fault found WRAs are being submitted to them. Unfortunately this best guess method of maintenance has greatly increased maintenance/logistic costs.

Boundary Scan is an IEEE standard that is typically used by the manufacture for board level manufacturing test applications. Boundary Scan enables the manufacturer of chip sets/Circuit Card Assemblies (CCAs) to perform functional acceptance testing at the original equipment manufacturer (OEM) production site. While the Boundary Scan process was designed and developed primarily for the production phase of the system/sub-systems, it should be possible to modify the Boundary Scan manufacturing test hardware and software tools for field level testing. This SBIR program initiative will identify the tools and techniques required to test not only the WRA (e.g. the circuit assemblies in a VHF/UHF receiver) but also the tools and techniques required to test systems that interface with the test system of interest ( e.g. the VHF/UHF receiver, the mission computer (controller), the power supplies, etc.).

Because IC chips are the heart of electronic circuits and they literally touch every point of the system, it may be possible to use Boundary Scan and the IC�s connectivity to fault isolate to the failed component. In many cases, Boundary Scan has the potential to find faulty components that BIT and support equipment solutions fail to identify. Additionally, this test process can be accomplished externally without the need of manual probing. Boundary Scan has never been used beyond the circuit card level. This effort is to develop tools to access single/multiple WRAs (outside of the box) at the Organization level of maintenance, with the intent on extracting vital diagnostic data, that can be used by the maintainer, to fault isolate to the point of failure.

Resulting information will significantly augment the weapons system's Built-in-Test (BIT) test data. With this additional Boundary Scan information, the Organizational level maintainer will have available the tool sets required to reduce false WRA removals to near zero percent. This ability to reduce false removals of WRAs will save millions of dollars a year in repair costs and significantly increase aircraft availability. This type of complete system testing using boundary scan has not been applied to Navy and Marine Corps avionics systems. To perform these innovative test routines, new software and Automated Test Equipment (ATE) will need to be designed and developed. This SBIR will address the requirement to develop these test systems. Special emphasis will be placed on the use of existing Common Support Equipment (CSE) and Peculiar Support Equipment (PSE) to augment Boundary Scan applications.

PHASE I: Investigate electronic systems used by the military that contain boundary scan and document issues that are relevant to their utilization in the framework of field support, diagnoses and repair. Develop the methodology and architectural concepts to support the use of algorithmic software that can utilize boundary scan for improved diagnostics of electronic systems. Document the feasibility of these methods and concepts using analysis and/or simulation results. Government Furnished information GFI (interface control documents, WRA specifications) will be provided to the selected offerors for use in their study phase.

PHASE II: Further explore the methods identified in Phase I. Design and develop algorithms, techniques and software/firmware prototypes that can be demonstrated and evaluated via simulation or benchtop testing. Document system supportability improvements (efficiency, accuracy, cost reduction) using Boundary Scan.

PHASE III: Create robust software, firmware, and/or hardware products to be used independently or in concert with CSE/PSE to achieve definitive fault isolation. Demonstrate the use of these products on a military electronic system. Provide cost benefit analysis for improved supportability and logistics.

PRIVATE SECTOR COMMERCIAL POTENTIAL/DUAL-USE APPLICATIONS: If Boundary Scan proves to be an effective field deployable tool for diagnosing complex electronic systems, its use could be expanded to include commercial avionic/electronic systems.

REFERENCES:
1. 1149.1A&B-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture, IEEE, Piscataway, NJ, Jan 1990. http://standards.ieee.org/findstds/standard/1149.1-1990.html

2. Bennetts, Dr. R G. "Boundary Scan Tutorial." 25 September, 2002. http://www.asset-intertech.com/pdfs/boundaryscan_tutorial.pdf

3. Frenzel, Louis E. "The Embedded Plan For JTAG Boundary Scan." September 11, 2008. http://electronicdesign.com/article/test-and-measurement/the-embedded-plan-for-jtag-boundary-scan19626.aspx >

KEYWORDS: Diagnostics; support; boundary scan; built-in-test; integrated circuits; access points

** TOPIC AUTHOR (TPOC) **
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