N121-093 TITLE: Ultra-Wideband Low Power Electronic Digitizer

TECHNOLOGY AREAS: Information Systems, Sensors, Electronics

ACQUISITION PROGRAM: JCREW S&T, FY12 EC New Start (Dave Tremper, Code 312)

RESTRICTION ON PERFORMANCE BY FOREIGN CITIZENS (i.e., those holding non-U.S. Passports): This topic is "ITAR Restricted". The information and materials provided pursuant to or resulting from this topic are restricted under the International Traffic in Arms Regulations (ITAR), 22 CFR Parts 120 - 130, which control the export of defense-related material and services, including the export of sensitive technical data. Foreign Citizens may perform work under an award resulting from this topic only if they hold the "Permanent Resident Card", or are designated as "Protected Individuals" as defined by 8 U.S.C. 1324b(a)(3). If a proposal for this topic contains participation by a foreign citizen who is not in one of the above two categories, the proposal will be rejected.

OBJECTIVE: Develop and demonstrate engineering prototypes of a power-efficient integrated digitizer with real-time multi-gigasamples per second processing capability that leverages commercial analog-to-digital converters (ADCs) while boosting their performance.

DESCRIPTION: New military communications, sensing and surveillance systems require ever-faster real-time digitization of electronic signals to achieve continuous sensing and utilization of the electromagnetic spectrum. Ultra-wideband, low-power, high-performance digitizers are needed in a wide range of Command, Control, Communications, Computers, Intelligence, Surveillance and Reconnaissance (C4ISR) applications. High performance ADC/Field-programmable Gate Array board digitizer products are commercially available, but are limited to a few GHz bandwidth and are primarily focused on digitization without sufficient digital signal processing capacity to perform user-specified real-time signal analysis. Hence these devices do not meet the needs of many applications where real-time monitoring of the electromagnetic spectrum and rapid response to threats are needed.

New power efficient technologies and architectures are needed to achieve next generation high-speed digitizers with high dynamic range (e.g., >8 Effective Number of Bits (ENOB), 20 GHz analog bandwidth, and <50 W total power dissipation). Achieving this real-time ultra-wideband digitizer performance at low system power consumption levels is a key challenge. Novel techniques that achieve ultra-wideband operation (20 GHz and beyond) while preserving high dynamic range with minimum power consumption are encouraged. Methods to consider may include: analog preprocessing combined with time- or frequency-interleaving of multi-channel ADCs; development of calibration methods; residual mismatch compensation in real-time hardware; development of algorithms for nonlinearity compensation; and hybrid approaches that judiciously combine the wideband capabilities of photonics with electronic quantization and digital signal processing. The technologies must be readily scalable in instantaneous bandwidth as the speed of commercial ADCs improve. Engineering prototypes of the scalable digitizers should be compatible with standard digital-interfaces for data transfer and configuration.

State-of-the-Art: Ultra-wideband digitizers may be achieved with interleaving multiple commercially available ADCs to achieve sampling rates and input bandwidths that scale with the number of ADC channels used. The performance of current time-interleaved ADCs (50 GHz analog bandwidth; 5 ENOB) suffer from channel mismatches, gain imbalances, and timing skews, all of which degrade digitizer dynamic range performance. Current ultra-wideband digitizer systems also suffer from high power dissipation (>50 W) which limit their utility in many applications even if bandwidth and dynamic range requirements are met.

PHASE I: Design the proposed new digitizer concept/architecture by analyzing its bandwidth, dynamic range and power consumption characteristics. Validate the digitizer design and performance through rigorous modeling and simulation to determine a rigorous Phase II prototype performance specification. Limited proof-of-concept demonstrations of novel aspects of the approach are encouraged but not required.

PHASE II: Develop, construct, test and demonstrate digitizer system prototype with real-time implementation of the algorithms and interfaces to a host computer. Perform a system demonstration of prototype hardware/firmware/software in a laboratory environment. Continue Phase I modeling and simulation efforts to iteratively refine and improve the digitizer hardware and software implementation.

PHASE III: Build field deployable digitizer system prototype and demonstrate in field trials. Transition the demonstrated technology to pre-production engineering prototypes for dual use markets.

PRIVATE SECTOR COMMERCIAL POTENTIAL/DUAL-USE APPLICATIONS: Real-time digitizers developed can be used in digitizer oscilloscopes for high-speed test and measurement instrumentation, next generation optical and wireless communications, and biomedical imaging and sensing. Scaling the technology to even higher bandwidths as commercial ADC advancements are made will be useful in a number of emerging applications ranging from 40G/100G optical communications to Terahertz spectrum analysis (useful for detection of concealed weapons and illegal drugs and scanning for hazardous materials). Higher speed military uses include imaging, surveillance in the IR and Terahertz frequency bands, and high-speed imaging and processing.

REFERENCES:
[1] Black, W.C., Hodges, D.A., "Time interleaved converter arrays," IEEE Journal of Solid-State Circuits, Vol. SC-15, No. 6, pp. 1022-1029 (1980).

[2] Jenq, Y.C., "Digital spectra of nonuniformly sampled signals: fundamentals and high-speed waveform digitizers," IEEE Transactions on Instrumentation and Measurement, Vol. 37, No. 2, pp. 245-251 (1988).

[3] Huawen, J., Lee, E.K.F., "A digital-background calibration technique for minimizing timing-error effects in time-interleaved ADCs," IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 47, Issue: 7, pp. 603 -613 (July 2000).

[4] Valley, G.C., "Photonic analog-to-digital converters," Optics Express, Vol. 15, pp. 1955-1982 (2007).

KEYWORDS: Analog-to-Digital Converters; Wideband Digital Receivers; Real-time Data Acquisition and Processing; Spectrum Monitoring; Signal Intelligence; Test and Measurement

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