N101-090 TITLE: Error Correction for Innovative ADC

TECHNOLOGY AREAS: Information Systems, Sensors, Electronics

ACQUISITION PROGRAM: PMW-120 for Ship’s Signals Exploitation Equipment (SSEE)

OBJECTIVE: The objective of this effort is to determine the performance advantage offered by real-time error correction of superconducting or other novel technology analog to digital converters (ADC).

DESCRIPTION: Error correction has demonstrated the ability to improve the SNR performance of Si ADC by as many as 3 bits. However, this has not yet been attempted in combination with ADC built using superconducting, advanced semiconducting (e.g. InP or InSb), or optical devices. Yet some of these rival the performance of highly mature Si ADC. The goal of this effort is to document what if any performance advantage can be derived by doing error correction on the data emerging from the ADC, essentially providing detailed calibration. (This is very distinct from error correction of waveforms which is done in the demodulation phase of RF receivers. Here correction of the individual values reported to make them better matches to the incident waveform is meant.) It is expected that the simplest version would correct for static calibration errors of, say, a flash ADC resistor ladder. (Vendors are expected to start from an innovative, fast sampling ADC of equivalent performance to a Si ADC or having a definite performance advantage such as ability to directly receive at a carrier frequency of 7.5 GHz or higher.) More complicated blind adaptive versions of error correction may be capable of finding systematic errors associated with specific design flaws or changes in the environment (e.g. temperature swings). Either FPGA or GPU platforms can be used to host the algorithms, though high raw sample rates are strongly preferred.

PHASE I: Finalize the relationship with an ADC vendor named in the proposal, agree on which signal sources to use in the initial testing, obtain either recorded data or the loan of an ADC for testing purposes, and demonstrate the ability of the first algorithm to handle a known (and discussed in the proposal) noise source. (Examples might include resistor ladder relative error or phase errors in a time interleaved ADC.) Generate a quantified argument re: the performance advantage expected to arise in phase 2 from a list of possibly useful, targeted algorithms.

PHASE II: Develop and prove out a more complex array of error correction schemes. Establish a schema for organizing the use of the different algorithms that is responsive to the signal circumstances. (For example, range of composite signal amplitudes, range of slew rates represented, or diversity of BW in signal set.) Determine how to relate the systematics of the error correction applied to the specific residual errors included in the ADC design. Determine how close to 3 bit improvement on a 10 MHz sample the effort ought to be able to produce and how the performance benefit will scale with output BW as the BW emerging from the ADC is widened toward 500 MHz. Estimate the latency and power consumption associated with the error correction and determine how/whether it scales with the performance enhancement achieved.

PHASE III: Finish optimizing and incorporate the error correction package and its mated ADC into an acquisition program product, most likely in the SIGINT realm.

PRIVATE SECTOR COMMERCIAL POTENTIAL/DUAL-USE APPLICATIONS: High performance, high sample rate analog to digital converters are especially applicable to wireless base stations where they can be used to handle a greater diversity of signal types and greater throughput of simultaneous signals. The error correction algorithms developed for 1 ADC will presumably be applicable to others. In addition, the techniques may be applicable to error correction as it applies to radiation upset events in conventional Si processors on space vehicles and to the corrections expected to be applied within future quantum computers.

REFERENCES:
1. http://en.wikipedia.org/wiki/Analog-to-digital_converter

2. http://portal.acm.org/citation.cfm?id=832297.836379

3.http://ieeexplore.ieee.org/Xplore/login.jsp?url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel5%2F10432%2F33126%2F01559465.pdf&authDecision=-203

4. http://www.analogzone.com/acqt0515.pdf

KEYWORDS: error correction; blind & adaptive; analog to digital converters; error sensing

** TOPIC AUTHOR (TPOC) **

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