DON26BZ02-DV052 TITLE: DIRECT TO PHASE II: Non-tactical Replacement of AN/UYK-43 in a Laboratory Environment
OUSW (R&E) CRITICAL TECHNOLOGY AREA(S): Applied Artificial Intelligence (AAI)
COMPONENT TECHNOLOGY PRIORITY AREA(S): Sustainment
PROJECTED CMMC LEVEL REQUIREMENT: Level 2 (Self)
The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), 22 CFR Parts 120-130, which controls the export and import of defense-related material and services, including export of sensitive technical data, or the Export Administration Regulation (EAR), 15 CFR Parts 730-774, which controls dual use items. Offerors must disclose any proposed use of foreign nationals (FNs), their country(ies) of origin, the type of visa or work permit possessed, and the statement of work (SOW) tasks intended for accomplishment by the FN(s) in accordance with the Announcement. Offerors are advised foreign nationals proposed to perform on this topic may be restricted due to the technical data under US Export Control Laws.
OBJECTIVE: Develop a non-tactical replacement for the UYK-43 computer system to ensure land-based testing remains viable for Aegis computer programs before deployment on board ships.
DESCRIPTION: The AN/UYK-43 (UYK-43) computer system is used to run certain baselines of the Aegis computer program. The UYK-43 is no longer manufactured. Operational UYK-43’s and spare parts are prioritized for operational fleet use and not testing. The Navy needs a replacement for the UYK-43 to enable land-based testing as there is no commercially available computer that is compatible with or emulates the UYK-43.
The solution must be binary compatible, provide compatible input/output capabilities, and have equivalent performance to the UYK-43. The computer programs of the Aegis Weapon System are commonly described as real-time embedded computer software. To ensure compatibility with the real hardware and guarantee that computer programs tested on the emulator work aboard ship, the input/output latency and throughput, memory and persistent storage capacity, and instruction timing must be matched precisely.
Compiler Monitor System (CMS)-2Y is a computer software language developed for tactical operations for Fleet Computer Programming Center - Pacific (FCPCPAC) to support Naval Tactical Data Systems (NTDS) operations. The language continues to be developed in use, eventually supporting several combat system computers including the UYK-43 which became the standard 32-bit computer of the Navy for surface ship and submarine platforms.
The solution will develop an emulator of the UYK-43, using open-source code and Commercial Off-the-Shelf (COTS) hardware to facilitate testing critical updates of Aegis ships operating with CMS-2Y tactical code. The emulator must execute the 32-bit CMS-2Y tactical code on a COTS computer system running a common operating system. The translated CMS-2Y code must perform similarly to UYK-43 to support various test requirements and scenarios in a laboratory environment. The emulation will be evaluated in a Navy land-based test facility using operational data to verify and validate emulator functionality.
Work produced in Phase II may become classified. Note: The prospective contractor(s) must be U.S. owned and operated with no foreign influence as defined by 32 U.S.C. § 2004.20 et seq., National Industrial Security Program Executive Agent and Operating Manual, unless acceptable mitigating procedures can and have been implemented and approved by the Defense Counterintelligence and Security Agency (DCSA) formerly Defense Security Service (DSS). The selected contractor must be able to acquire and maintain a secret level facility and Personnel Security Clearances. This will allow contractor personnel to perform on advanced phases of this project as set forth by DCSA and NAVSEA in order to gain access to classified information pertaining to the national defense of the United States and its allies; this will be an inherent requirement. The selected company will be required to safeguard classified material during the advanced phases of this contract IAW the National Industrial Security Program Operating Manual (NISPOM), which can be found at Title 32, Part 2004.20 of the Code of Federal Regulations.
PHASE I: For a Direct to Phase II topic, the Government expects that the small business would have accomplished the following in a Phase I-type effort and developed a concept for a workable prototype or design to address, at a minimum, the basic requirements of the stated objective above. The below actions would be required in order to satisfy the requirements of Phase I:
• Developed a concept UYK-43 emulator
• Demonstrated the concept meets all parameters in the Description.
• Demonstrated feasibility in meeting the requirements in the Description to support the test and operational environments.
• Feasibility established through analysis and modelling.
FEASIBILITY DOCUMENTATION: Offerors interested in participating in Direct to Phase II must include in their response to this topic Phase I feasibility documentation that substantiates the scientific and technical merit and Phase I feasibility described in Phase I above has been met (i.e., the small business must have performed Phase I-type research and development related to the topic NOT solely based on work performed under prior or ongoing federally funded SBIR/STTR work) and describe the potential commercialization applications. The documentation provided must validate that the proposer has completed development of technology as stated in Phase I above. Documentation should include all relevant information including, but not limited to: technical reports, test data, prototype designs/models, and performance goals/results. Work submitted within the feasibility documentation must have been substantially performed by the offeror and/or the principal investigator (PI). Read and follow all of the DON SBIR Direct to Phase II Broad Agency Announcement (BAA) Instructions. Phase I proposals will NOT be accepted for this topic.
PHASE II: Develop, demonstrate, validate, and deliver a prototype UYK-43 emulator based on the results of Phase I. The application will be implemented in an existing Government-approved and provided modeling and simulation environment to validate performance. It will be evaluated by Government subject matter experts for validation.
It is probable that the work under this effort will be classified under Phase II (see Description section for details).
PHASE III DUAL USE APPLICATIONS: Support the Navy in transitioning the prototype UYK-43 emulator to allow for further experimentation and refinement. The prototype emulator will be incorporated into the testing for Aegis baseline modernization process. This will consist of integration into a baseline definition, incorporation of the baselines existing and new threat capabilities, validation testing, and combat system certification.
Computer science and computer engineering professions will benefit from learning to make computer programs written for legacy computer systems run on modern instruction set architectures; learning how to ensure timing of computer programs is maintained on a foreign computer architecture; learning to ensure input/output is compatible between legacy and modern computers.
REFERENCES:
KEYWORDS: AN/UYK-43 emulator; CMS-2Y tactical code; Real-Time Embedded Computer Software; Aegis Computer Programs; Land-Based Test Facility; Obsolete Hardware
| 6/1/26 | Q. | 1. For the 250 I/O channels feeding the `43 CPU we presume we must emulate the I/O controllers along with characteristics of the many sensors/systems attached to them. Faithfully reproducing accurate timing of legacy fires control algorithms the CPU must manage becomes a major engineering challenge, simply due to interdependencies between I/O channels, query/response delays in actuators, etc. The CPU is tasked with solving differential equations to calculate trajectories in near real time and must accommodate gun motion lag and dynamic ship/sub motion, all coded into the loop control software. Assuming that one could successfully emulate binary compatible code, yet system I/O timing was undefined I/O potentially ran far too fast for real world system motors/ actuators to faithfully respond and react to, legacy control loops would produce impossible-to-implement control signals. Are proposals expected to emulate the I/O subsystems and if "no", how to we define the unit interface for the I/O? It would appear that also emulating the I/O is a huge part of the work and without faithful I/O any emulation would produce useless nonsense, even if `binary compatible'.
2. Would the government elaborate what its definition of `binary compatible' implies? (e.g. `Runs legacy code without throwing exceptions', or `produces identical mathematical calculation results for all input parameter cases', or `faithfully reproduces live fire control dynamic behaviors' . or all three?) 3. Will the government provide as GFE '43 test hardware and if so how soon after award could this access occur? |
| A. | As the Technical Point of Contact (TPOC) for this Direct to Phase II topic, I must adhere strictly to the information provided within the Broad Agency Announcement (BAA) and its references. To ensure a fair and equitable process for all potential proposers, and responses do not limit the innovative process, I cannot provide additional details, clarification, or guidance beyond what is provided below.
For context, the BAA's stated objective for this topic (DON26BZ02-DV052) is: "Develop a non-tactical replacement for the UYK-43 computer system to ensure land-based testing remains viable for Aegis computer programs before deployment on board ships." The answers below are based solely on the information available in the solicitation documents in service of this objective. A1: The BAA states the solution must "provide compatible input/output capabilities" and that "the input/output latency and throughput... must be matched precisely." The "UYK-43(V) - Archived 6/2007" reference specifies the UYK-43 architecture includes an "input/output controller (IOC) with one to 64 full duplex input/output channels, throughput of three million words per second." The BAA and its references do not provide further details on the characteristics of attached sensors/systems, loop control software delays, or how to specifically emulate the individual I/O subsystems beyond what is written. A2: The BAA requires the solution be "binary compatible" but does not provide a more detailed definition or itemized list of criteria for the term within the provided documentation. A3: The BAA does not state that the government will provide UYK-43 test hardware as Government Furnished Equipment (GFE). However, offerors may identify and request specific GFE (such as access to legacy hardware or test facilities) that they deem necessary to successfully execute their proposed technical approach. Any requests for GFE must be clearly detailed in the proposal, along with a justification of need and the impact on the project if the GFE cannot be provided. The government will evaluate such requests during the proposal review process, but makes no guarantee that requested GFE will be made available. |
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| 6/1/26 | Q. | 1. The programmer's reference provided does not provide any level of detail about Sperry's 32 bit floating point (FP) instruction implementation beyond the four types (unfortunately it sure is not IEEE-754!) FP instructions are extensively used in real time calculations and the must be accurate, such as whether transcendental functions are implemented as Taylor series vs. CORDIC (Coordinate Rotation Digital Computer) algorithm computes transcendental functions like trigonometric, hyperbolic, logarithmic, and exponential values using only addition, subtraction, and bit-shifting to avoid resource-heavy hardware multipliers.) We know Sperry had a commercial 36 bit FP, however, the UYK-43 FP significantly differs from that. and you cannot simply truncate or say "it's good enough'. Assuming your answer is "The contractor must use reverse engineering to figure out the intricacies of the FP", even having a local UYK-43 system, would be prohibitively costly due to the massive amount of potential combinatorial numbers of FP calculations. Since the stated need is 'binary compatible' and these are munitions targeting calculations that must be accurate to "least significant bit", these implementation details cannot be ignored.
2. The need for binary-compatible extends to implementing emulation of known bugs in the '43 hardware (i.e. not an emulation based on a specification but actual implementation schematics). Does this known-limitation and implementation documentation actually exist within the government, and what media form is it in? 3. There is no mention of performance/timing. Are we to assume that ` binary-compatible' implies we must match the system instruction-by-instruction timing behavior? If "YES" where is that information published? 4. Are there any parallel R&D/development programs underway to effectively replace the UYK-43 and what is its present status? Is there a potential that a commercial emulator could potentially extend the filed life of these systems or does DON have an alternate plan for the future? In order to prepare a proposal with a reasonable chance of success, would the sponsor please share this design information publicly, or at least at a minimum assert it all exists? |
| A. | As the Technical Point of Contact (TPOC) for this Direct to Phase II topic, I must adhere strictly to the information provided within the Broad Agency Announcement (BAA) and its references. To ensure a fair and equitable process for all potential proposers, and responses do not limit the innovative process, I cannot provide additional details, clarification, or guidance beyond what is provided below.
For context, the BAA's stated objective for this topic (DON26BZ02-DV052) is: "Develop a non-tactical replacement for the UYK-43 computer system to ensure land-based testing remains viable for Aegis computer programs before deployment on board ships." The answers below are based solely on the information available in the solicitation documents in service of this objective. A1: The BAA requires a "binary compatible" solution. The provided "CMS-2Y Programmer's Reference Manual for the AN/UYK-7 and AN/UYK-43" describes the formats and types for the 32-bit FP instructions. It does not, however, describe the specific underlying algorithms (e.g., Taylor series vs. CORDIC) of the FP implementation. A2: The BAA requires a solution that is "binary compatible" with the UYK-43. The BAA and its references do not provide documentation on known hardware limitations, legacy bugs, or physical implementation schematics. A3: The BAA states that "the input/output latency and throughput, memory and persistent storage capacity, and instruction timing must be matched precisely." The "UYK-43(V) - Archived 6/2007" reference document states the CPU offers a performance of a "150-nanosecond microcycle and 2.25 million instructions per second (MIPS)." Detailed, instruction-by-instruction timing data is not published in the BAA or its provided references. A4: The BAA is the sole source of information for this solicitation. Information regarding other programs, future plans, or internal design documentation is outside the scope of this BAA and will not be provided. |
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| 5/28/26 | Q. | 1. The solicitation states emulation must be "binary compatible" and we presume this implies Floating Point (FP) instruction calculations must produce exactly identical binary results to simulate precise, repeatable calculations i.e. for target solutions. This math involves transcendental functions implemented within FP that the UYK family runs. However, the two documents referenced do not include description of AN/UYK-43's ISA instructions, especially the necessary details on its FP instructions. As UYK-43 does not implement standard IEEE-754 FP, where can proposers obtain documentation on these vital FP instructions? (Even with test hardware, 32 bit FP instructions produce far too many potential results to exhaustively reverse engineer the span of calculations.)
2. Are we to presume emulation timing must match the existing UYK-43 hardware? If "yes", where can we find this detailed ISA instruction timing? |
| A. | As the Technical Point of Contact (TPOC) for this Direct to Phase II topic, I must adhere strictly to the information provided within the Broad Agency Announcement (BAA) and its references. To ensure a fair and equitable process for all potential proposers, and responses do not limit the innovative process, I cannot provide additional details, clarification, or guidance beyond what is provided below.
For context, the BAA's stated objective for this topic (DON26BZ02-DV052) is: "Develop a non-tactical replacement for the UYK-43 computer system to ensure land-based testing remains viable for Aegis computer programs before deployment on board ships." The answers below are based solely on the information available in the solicitation documents in service of this objective. A1: The BAA requires the solution to be "binary compatible." While the government-provided references do not utilize the specific acronym "ISA", the provided "CMS-2Y Programmer's Reference Manual for the AN/UYK-7 and AN/UYK-43" does describe the available instruction set, including the formats and types for the Floating Point (FP) instructions. However, the specific implementation details of these instructions and the underlying hardware algorithms are not described in the provided references. A2: The BAA states that "the input/output latency and throughput, memory and persistent storage capacity, and instruction timing must be matched precisely." The "UYK-43(V) - Archived 6/2007" reference document states the CPU offers a performance of a "150-nanosecond microcycle and 2.25 million instructions per second (MIPS)." As noted above, the term "ISA" is not utilized in the provided documentation, and detailed, per-instruction timing data is not published in the BAA or its provided references. |
** TOPIC NOTICE ** |
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